1. Field of the Invention
The present invention relates in general to an electric circuit and a method for forming the same.
2. Description of the Prior Art
As from '80s, gate electrodes of MOS type semiconductor integrated circuits have been formed mainly from silicon. This is because of the small differential electron energy between the silicon gate and the underlying semiconductor channel region and the great heat resistance of silicon which make it possible to utilize the self-aligning fabrication technique for forming source/drain regions. On the contrary, the self-aligning fabrication technique is not available in the case utilizing aluminum gate electrodes which had been broadly employed prior to the silicon gate. This is because aluminum does not have a sufficient resistance to heat. Aluminum gates have been considered out of date for this reason in spite of the low electric resistance thereof.
Recently, however, it has been reported to utilize the self-aligning fabrication technique for forming source/drain regions also in the case of aluminum gates by employing laser annealing techniques. It has also been proposed that interlayer insulation from the gate electrodes can be sufficiently performed by forming anodic oxide films on the gate electrodes together with wirings formed from the same material at the same time. The gate electrodes and the wirings are generally referred to for both simply as gate electrode wirings hereinbelow because they can not always be exactly distinguished from each other. The aluminum oxide films have a sufficient corrosion resistance and a sufficient pressure resistance and are utilized to form the so-called offset structure between the gate and the source and drain regions as described in Japanese Patent Application No. Hei3-340338, Japanese Patent Application No. Hei4-30220 or Japanese Patent Application No. Hei4-84194 of the same applicants.
Several problems, however, have been pointed out in the technique utilizing anodizing gate electrode wirings. For example, even if the external surfaces of the gate electrode wirings are coated with aluminum oxide films, the adhesivity between them fluctuates depending on the location of the surfaces so that the aluminum oxide films sometimes partially comes off from the underlying gate electrode wirings. In addition to this, the anodic aluminum oxide film are formed with substantially disparity of the thickness depending on the location on the gate electrodes. Furthermore, since the aluminum oxide films have an extremely strong resistance against corrosion, it is difficult to remove them by usual wet etching or dry etching so that other materials such as silicon oxide existing near the aluminum oxide films tend to be etched during the removal of the aluminum oxide films. Furthermore, since the gate electrode wirings are integrally connected to each other during the anodizing in order to treat the gate electrodes as an anode, unnecessary portions connecting the individual gate electrodes must be removed after the anodizing to separate them. The unnecessary portions, however, are also coated with aluminum oxide and therefore it is very difficult to remove them. Furthermore, it is also difficult to open necessary contact holes through the corrosion-proof aluminum oxide films to access the underlying gate electrode wirings so that neighboring circuit elements are also corroded.
On the other hand, it is proposed to partially remove the gate electrode wiring coated with aluminum oxide and to open contact holes by exposing necessary portions to high energy laser illumination as described in Japanese Patent Application No. Hei3-348130. The underlying gate electrode wirings are damaged by the high energy laser light so that it seems impossible to form contact holes by this method.